Pt 2 CPU, RAM and Northbridge
1 RAM and Northbridge, and the relationship between the CPU overs to know.
Rivers, as I explained in Part 1 of the CPU clock is the internal clock and the external clock can be divided into the relationship and the external clock can not stop eating them little stop eating them little raeya told that RAM and memory are closely related. To explain, for there should go beyond those first few know before I'll explain.
(1) bus speed, bandwidth
First have to know about the bus speed. Bus speed of internal clock multiplication because drainage.
-Speed bus (Bus speed)
Hertz is the bus speed of the unit. Middle and high school physics time to fall asleep when you did those hertz per second frequency the revelation'd know. Computer is used as the number of data transfers per second. For example, the CPU, bus speed is 200Mhz 200 million times per second data transfer mean that. 's As simple as you do not know? Mega with 6 wins and 10 bets? killo, Mega, Giga, Tera, Peta in order 10 3 seungssik goes.
- Bandwidth
The amount of bus transfers per second of data bandwidth. Since the Pentium, 64bit (8byte) external approach because the CPU at a time 8byte by data transmission. CPU bus speed of 200Mhz data transfer per second, 200 million times that I told you. But the QDR technology is anonymous. Real-time clock, 800Mhz FSB 200Mhz Quad peompim quadrupling good deal. In other words, the bus speed is 200Mhz, but actually acts like a 800Mhz means that Data transfer per second, 800 million times. Bandwidth so 800,000,000 * 8 (byte) 6400Mbyte / s.
Bandwidth = Effective Clock * 8byte
Effective Clock = apply technology to the real-time clock * by drainage
QDR technology applied to the CPU Effective Clock acting silkeulreok quadrupling of DDR memory technology, and technology is acting silkeulreok doubled.
Bandwidth of approximately above only need to know the simple arithmetic can tell.
Let's calculate the bandwidth ex) of Conroe E2140
E2140 bus speed is 200Mhz. FSB QDR loin year 200Mhz * 4 = 800Mhz. Here because the data transfer per clock 8byte by 800Mhz * 8 = 6400Mbyte/sec = 6.4Gbyte/sec.
The reason is easy to remember and try again repeatedly ** did earlier calculations is to
Each type * CPU bandwidth
Northwood bandwidth b, Prescot a (FSB533Mhz)
533Mhz * 8byte = 4.2GB / s
Prescott E, Pentium D, E21 * 0, E4 * 00 (800Mhz) the bandwidth of the
800Mhz * 8byte = 6.4Ghz / s
Conroe E6 * 00, E6 * 20, kaencheu field Q6600 (FSB 1066Mhz) the bandwidth of the
1066Mhz * 8byte = 8.5GB / s
Conroe E6 * 50, the bandwidth of the Q6700 (FSB 1333Mhz)
1333Mhz * 8byte = 10.7GB / s
About bandwidth, CPU-specific cleanup like this.
Noticed fast identification numbers vaguely familiar that your husband is in jail knew the will.
6400, 4200, 3200 ... Numbers with the same ram bearing on the kind of gotchas that Is successful if she knew ... ㅡ ㅡ "I understand when you sync the math is just.
(2) Synchronization
Fit synchronize the CPU and DRAM bandwidth 1:1 says something. Why did they fit? This is because the bottleneck. Road side, saying traffic bottleneck and is the same principle. To send and receive data through the CPU and RAM, North Bridge. RAM and CPU bandwidth of either large or small, if the width of a way to move data suddenly become smaller and, accordingly, will be a bottleneck. Bandwidth is the width of the road, literally, quickly understand if you think I'm standing.
Bottlenecks Naver Encyclopedia (excerpt)
Typically follow the narrowing of the neck of the water or liquid when suddenly pouring the bottle is to prevent Suddenly narrow for a vehicle packed with traffic congestion, which arises due to the width of the narrower roads where vehicle congestion occurs at the width of the road is wide, it is likened to the neck of the bottle is a bottleneck.
For example, two turns into a one-lane, two-lane road at the same time every Driving vehicles as increasing vehicle congestion by reducing the chronic traffic congestion will cause serious traffic can cause problems. Particularly inefficient bottlenecks that have a lot of time and economic damages from happening in the city at rush hour vehicles in a short period of time, Molly.
Neck phenomena CPU RAM bandwidth more bandwidth than the plague caused the cursor. So it's 1:1 matching. Unconditionally unless Plague neck phenomenon would ram clock big ... if the night went.
Then, How should I sync? Described above, the bandwidth of the CPU 드렸죠. Then the bandwidth of the ram.'d Compels
Can look at the specs of the RAM that comes this way.
DDR PC3200 400Mhz
DDR2 PC4200 533Mhz
DDR2 PC5300 667Mhz
.
.
.
It's written in this way. Looking For example, the primacy of PC3200 (I'll) 400Mhz clock is valid. Silkeulreok the 200Mhz DDR (Duble Data Rate) technology is applied silkeulreok twice as long acting as a valid clock to 400Mhz.
(Briefly, above) over the CPU-Z to check your computer specs, different memory clock Asked Questions minutes deogunyo're pretty. Clock silkeulreok Yes, because it is shown in CPU-Z. Share memory types when talking clock's clock is valid. Think if you are in the context of the CPU of the same part of the QDR technology. From now on, with this CPU.
400M * 8 (byte) = 3200MB / s, RAM and the same kind of designation number. So PC3200 RAM will Anything else she goes. Directly calculate bosimyeon (exactly ** 00 This fall, but an approximation will) you'll notice
So now you will have noticed how to map synchronization. 's Bandwidth equal to the bandwidth of the CPU and the RAM PC4200 PC3200 RAM, FSB533 CPU FSB400-CPU ...... Pretty simple, huh?
By memory bandwidth
DDR PC3200 = 3.2GB / s
DDR2 PC4200 = 4.2GB / s
DDR2 PC5300 = 5.3GB / s
DDR2 PC6400 = 6.4GB / s
I do to this what names bandwidth because nothing Cleanup high.
(3) dual-channel
However, a single ram, FSB 800Mhz, Prescot, since hardly match the number of CPU bandwidth becomes felt PC3200 DDR1 RAM with a maximum bandwidth of the bandwidth of 3.2GB / S is only because Prescot and synchronized with the bandwidth of 6.4GB / s almost impossible to The perceived performance difference between the previous days FSB533, Northwood b larger cache memory does not support Hyper-Threading, because even though there are some bottlenecks was low, so you're so desperate to synchronization degree was not.
But it had armed and come out the Northwood C and E Prescott over high bandwidth FSB 800Mhz CPU with Hyper-Threading, dual-channel technology is more important.
Doubling the bandwidth of dual-channel memory parallelization techniques. Use the operating speed of the ram and the motherboard must support (865P chipset from Intel chipset based dual-channel support)
A typo in the overclocking even strangers know dual channel usually turns out. Will not add a description.
Recently released board supports dual channel. All except for some of the board supports dual-core CPU chipset supports dual channel. So mind the dual-channel configuration, synchronization, and if you think that is
If you really understand the top of the arithmetic synchronization only.
ex) E2140 (a lot of that CPU overhead.) memory synchronization.
E2140, the FSB is 800Mhz. Bandwidth of 6.4GB / s's came out (in the above example) Then you can create a memory dual channel 6.4GB / s of bandwidth to have Word of RAM to 3.2GB / s This is a dual channel configuration.
But when there is any question here You've got to. Of the board supports dual-core CPU board that supports DDR RAM PC3200 DDR is, I wondered if I would like very few, and those who think we've got Then not to synchronize.
The answer is simple. CMOS setup menu to adjust the RAM clock. RAM 400Mhz clock, if not more RAM DDR pc3200 ram after you have configured a dual guess you would.
** Recent trend is that CPU is Core 2 Duo series, the existing NetBurst architecture of the Pentium 4 because it dramatically reduces the bottleneck, compared to the Pentium D was virtually one one motive rather than the CPU: DRAM 4:5 or 3: is generally supposed to hit 25 percent asynchronous. Core 2 Duo series sseusineun fit a 1:1 rather than a 1:1 ram clock than the clock synchronization, grasp the top step is recommended that Pentium 4 or Pentium D 1:1 principle agent.
2 North Bridge
Relatively fast device that controls hardware of Northbridge chipset. Faster hardware, because the RAM to send and receive data via the CPU and Northbridge. So whether your CPU to the Motherboard support the FSB of the CPU North Bridge support? Maneunyaui is key.
Why Northbridge overclocking matter whether! Those you do not know? Let me explain, if Overclock explain several times earlier, but ... work with him, but by raising the internal clock FSB by overclocking go up.
Now, main board sseusineun you have just the FSB of the CPU when noohbeo only board that supports what about you? For example, you may want to reconsider that. Combination of P965 board that supports up to FSB1066 Core 2 Duo E6600 (FSB1066), albeit Where overclocking is this possible? The answer is 'almost Northbridge hang on' till juneunde
Overs yield very honed Core 2 Duo Motherboard supports FSB1066 only do. Northbridge overclocking too. Expensive board of the Asus daeptta yield really do tend overs. But the vast majority of your high-end users, because ultimately the limits of the North Bree first will find.
Conclusion what it is, overclock it to the board to support a slightly higher FSB than the FSB of the CPU's own will that you should write. Actually, do the board if it does not yield a good over-advanced.
(1) a regular clock, irregular clock
You ever had a chance to do not know the regular clock, irregular clock over the word. What you're talking about and told what motherboard supports FSB CPU's FSB to fit over regular clock over clock over what otherwise irregular.
Motherboard FSB 533, 800, 1066, 1333 in this way step-by-step support. Then you will be able to know what a regular clock, clock.
CPU FSB to fit in a regular clock overhead, an external clock * 4 (QDR) CPU external clock, so we need a 533, 800, 1066, 1333, 133, 200, 266, to 333 to give me a regular clock over. Called Otherwise irregular offhandedly 123, 300 What to give in this way, say do clock over.
Some reason the regular clock over.
- PCI clock does not change. : PCI device can also happen via the North Bridge, and does not support FSB Northbridge (non-clock over) PCI devices when the clock changes and to act as if the sound is off or graphics, such as inability to unstable. Recent Motherboard fixed-function support most PCI PCI clock fixed in the CMOS setup by releasing irregular clock over even it does not matter.
Exactly 1:1 memory and can be synchronized memory also 400 (dual channel 800) 533 (dual-channel 1066) 667 (1333) dual channel step-by-step clock can be adjusted, so (700 this shit can not adjust the way only accurate clock over regular synchronized 1:1) can But again, as I said before a recent CPU does not mean much because the bottleneck slashed.
Regular clock over and finally, the recent trend of the CPU and Motherboard irregular clock over the larger meaning not Just for the record .... ㅡ ㅡ;
3 ram timing
If you are interested in the hardware, RAM timing, what you'll notice. But the novice who do not ... well. Have you guys seen the numbers 4-4-4-8, 4-4-4-12, etc., written in this way in addition to the clock when the ram you will be (ㅡ ㅡ you have never seen If you find ;) Anyway, this set of RAM is required to run the RAM timing is value. Below will capture part in CPU-Z Memory
Each item. CAS # Latency less than the RAM timing. Clocks, you know, you look at the trailing unit is the unit of time. Smaller the faster. Ram the initial launch when the SPD will wear. Of RAM is required to run the various information contained there. RAM timing, too Whatever damgyeoseo the initial launch will be in the SPD. But it is not a fixed value and can be modified arbitrarily.
'Loosen' what to 'tighten' and that when overclocking RAM SPD set the timing to be smaller than the value of reducing significantly. Ie RAM timing, tighten the rest! Me set the value smaller than the default line in if is (CMOS setup) Usually when overclocking in the first RAM timing, loosen. RAM timing to release the RAM is because the timing and clock. To put it simply, one trillion RAM timing tightened up the clock clock loosen the mean rises.
But the clock as the school bully, RAM timing constriction clock different than large performance improvements. But not able to catch two rabbits, the first to catch the larger rabbit thought. So once the RAM overclocking after releasing there, according to the timing of re-tighten the ram timing to tighten up. Jineunde
Description for each item, RAM timing, link directly to be quite long, so I'll reply.
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